preliminary wirelessusb? proc? flash programmable mcu + rad io cywusb695 3 cypress semiconductor corporation 198 champion court san jose , ca 95134-1709 408-943-2600 document #: 38-16017 rev. *c revised august 19, 2005 features ? microcontroller with mixed signal array ? cypress m8c cpu ? cpu clock up to 12 mhz ? internal oscillator?no crystal required ? 8-kb flash program memory with eeprom emulation ? 512 bytes sram data storage ? 4 analog blocks provide: 2 comparators with dac refs two 8-bit 28-channel adcs ? 4 digital blocks provide: 8- to 32-bit timers, counters, and pwms crc and prs modules full-duplex uart, spi master or slave connectable to all gpio pins 2.4-ghz dsss radio transceiver ? operates in the unlicensed industrial, scientific and medical (ism) band (2.4 ghz ?2.483 ghz). ? ?95 dbm receive sensitivity ? up to 0 dbm output power ? range of up to 50 meters or more ? data throughput of up to 62.5 kbits/sec ? highly integrated low cost, minimal number of external components required ? dsss baseband controller ? 13-mhz crystal clock ? integrated 30-bit manufacturing id operating voltage from 2.7v to 3.6v operating temperature from 0 to 70c offered in a small footprint 48 qfn applications consumer/pc ? locator alarms ? presenter tools ? remote controls ?toys ?white goods building/home automation ? climate control ? lighting control ? smart appliances ? on-site paging systems ? alarm and security industrial control ? inventory management ? factory automation ? data acquisition ? automatic meter reading (amr) transportation ? diagnostics ? remote keyless entry medical functional description the cywusb6953 wirelessusb? proc? (programmable radio system-on-chip) device is the world?s first low-cost flash programmable microcontroller with an integrated 2.4-ghz radio transceiver. figure 1. typical implementation
preliminary cywusb695 3 document #: 38-16017 rev. *c page 2 of 7 functional overview the cywusb6953 is a complete radio system-on-chip device, enabling many simple rf systems to be implemented with a single device and a handful of discrete components. the cywusb6953 is designed to implement low cost wireless systems operating in the worldwide 2.4-ghz industrial, scien - tific, and medical (ism) frequency band (2.400 ghz?2.4835 ghz). the radio meets the following world-wide regulatory require - ments: europe etsi en 301 489-1 v1.4.1 etsi en 300 328-1 v1.3.1 north america fcc cfr 47 part 15 japan arib std-t66 the microcontroller is a powerful mixed-signal array. it has highly reconfigurable and flexible digital and analog blocks. the microcontroller core is the m8c 8-bit engine that supports a rich instruction set. it contains 512 bytes of data sram and 8 kbytes code flash memory. full data on the microcontroller can be found in the cy8c21534 datasheet and the psoc? technical reference manual the radio is a high-performance 2.4-ghz transceiver with a fully integrated dsss baseband. the radio and baseband are both code and frequency agile. protocols supporting frequency agile direct-spread interference avoidance algorithms such as wirelessusb are fully compatible with this radio. full data on the radio can be found in the cywusb6935 data sheet. radio data rate considerations the psoc designer tool provides a software-based spi user module for control of the radio portion of the proc. therefore, there is a direct relationship between cpu clock speed and supportable radio data rate. for operation of cpu clock rates less than 12 mhz, radio data rate must be set to 16 kbps. also note that for operation at v cc < 3.0v, the cpu clock rate must be set to 3 mhz per the cy8c21534 data sheet. therefore, at operation below 3v, the radio data rate must be set to 16 kbps. digital psoc block array analog psoc block array system resources clocks, i2c, por, ref psoc m8c core 8kb flash 512b sram io ports 2.4-ghz wirelessusb radio transceiver rfin rfout xres x13_out pactl p0 p1 p2 irq, miso proc block diagram figure 2. proc block diagram
preliminary cywusb695 3 document #: 38-16017 rev. *c page 3 of 7 pin descriptions pin qfn name type die description analog rf 47 rfin radio modulated rf signal received. 2 rfout radio modulated rf signal to be transmitted crystal / pa control 38 x13 i radio crystal input 37 x13in i radio crystal input 24 x13out o radio reference clock output 35 pactl io radio external power amplifier control. pull-down or make output reserved 23, 25 miso io radio, mcu radio spi master in, slave out. connect pins 23 and 25 on the application board 17, 21 irq io radio, mcu radio interrupt. connect pins 17 and 21 on the application board microcontroller digital/analog 13 p0[0] io/m mcu analog column mux input 14 p0[2] io/m mcu analog column mux input 41 p1[0] io/m mcu i2c serial data (sda) 36 p1[1] io/m mcu i2c serial clock (scl) 42 p1[2] io/m mcu 44 p1[4] io/m mcu optional external clock input (ext-clk) 34 p1[5] io/m mcu i2c serial data (sda) 6 p1[6] io/m mcu 33 p1[7] io/m mcu i2c serial clock (scl) 8 p2[0] io/m mcu direct switched capacitor block input 31 p2[1] io/m mcu direct switched capacitor block input 9 p2[2] io/m mcu direct switched capacitor block input 30 p2[3] io/m mcu direct switched capacitor block input 10 p2[4] io/m mcu 29 p2[5] io/m mcu 12 p2[6] io/m mcu 28 p2[7] io/m mcu 7 xres i mcu active high external reset with internal pull-down power and ground 4, 11, 15, 18, 26, 27, 32, 39, 40, 43, 45 v cc supply voltage 1, 3, 5, 46, 48 gnd ground connection paddle gnd ground connection 19, 20 rsvd connect to ground 16, 22, nc no connect
preliminary cywusb695 3 document #: 38-16017 rev. *c page 4 of 7 xres_b c12 27 pfd l1 3.3 nh xres sclk sdata p1_5 34 gnd 46 vcc1 4 p2_2 9 nc3 19 vcc6 32 nc4 20 p1_6 6 p0_1 25 miso 23 irq 21 vcc4 26 p0_2 14 x13out 24 p2_7 28 p2_5 29 gnd 5 p0_0 13 nc1 16 p1_7 33 pactl 35 p1_0 41 nc2 22 p1_4 44 p1_2 42 x13 38 vcc10 45 gnd 1 tab 49 rfout 2 gnd 3 xres 7 p2_0 8 p2_4 10 vcc2 11 p2_6 12 vcc3 15 p0_6 17 vcc_ps 18 vcc5 27 p2_3 30 p2_1 31 p1_1 36 x13in 37 vcc7 39 vcc8 40 vcc9 43 rfin 47 gnd 48 u1 c ywusb6953-48lfc vdd c10 2.0 pfd c9 2.0 pfd c11 1.2 pfd l2 2.2 nh p1_1 p1_0 xres_b 1 2 3 4 5 j1 5 pin hdr vdd p1_1 p1_0 c1 10 ufd 16v c2 0.1 ufd c3 0.1 ufd c4 0.1 ufd c5 0.1 ufd c6 0.1 ufd c7 0.1 ufd c8 0.1 ufd vdd y1 13.0 mhz programming interface
preliminary cywusb695 3 document #: 38-16017 rev. *c page 5 of 7 proc absolute maximum ratings parameter description min. typ. max. unit storage temperature ?55 100 c ambient temperature with power applied 0 70 c supply voltage on v cc relative to vss ?0.3 3.9 v dc voltage to logic inputs ?0.3 v cc + 0.3 v dc voltage applied to outputs in high-z state ?0.3 v cc + 0.3 v maximum current into any port pin ?25 50 ma static discharge voltage (rf) 500 v static discharge voltage (other) 1600 v latch-up current 200 ma proc operating conditions parameter description min. typ. max. unit v cc supply voltage 2.7 3 3.6 v ta ambient temperature 0 25 70 c proc dc electrical characteristics parameter description min. typ. max. unit v cc supply voltage 2.7 3 3.6 v i cc supply current (radio in power down) 1.7 2 ma rx i cc supply current radio receive 61.3 ma tx i cc supply current radio transmit 74.7 ma synth settle i cc current consumption with synthesizer on, no transmit or receive 33.0 ma idle i cc supply current radio idle 5 ma i sleep sleep mode supply current 3 20 ua ordering information part number radio package name package type operating range CYWUSB6953-48LFC transceiver 48 qfn 48 quad flat package commercial
preliminary cywusb695 3 document #: 38-16017 rev. *c page 6 of 7 ? cypress semiconductor corporation, 2005. the information contained herein is subject to change without notice. cypress semic onductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress produ ct. nor does it convey or imply any license under patent or ot her rights. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agr eement with cypress. furthermore, cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to re s ult in significant injury to the user. the inclusion of cypress package diagram wirelessusb, psoc, and proc are trademarks of cypress semiconductor corporation. all products and company names mentioned in this document may be the trademarks of their respective holders. 0.80 dia. 6.70 6.90 c 1.00 max. n seating plane n 2 2 0.230.05 0.50 1 1 0.08 0-12 0.30-0.45 0.05 max. c 0.20 ref. 0.80 max. pin1 id 5.45 0.420.18 (4x) 7.10 6.80 6.70 6.80 7.10 6.90 5.55 5.45 5.55 0.20 r. 0.45 y x top view bottom view side view e-pad dimensions in mm min. max. e-pad size paddle size 5.1 x 5.1 3.8 x 3.8 4.0 x 4.0 5.3 x 5.3 (x, y max.) reference jedec mo-220 pkg. weight 0.13 gms 48-lead qfn 7 7 mm lf48a 51-85152-*b
preliminary cywusb695 3 document #: 38-16017 rev. *c page 7 of 7 document history page document title: cywusb6953 wirelessusb? proc? flash programmable mcu + radio document number: 38-16017 rev. ecn no. issue date orig. of change description of change ** 329973 see ecn bon new data sheet *a 337935 see ecn bon in the feature section, changed ?90 dbm receive sensitivity? to ?? 90 dbm receive sensitivity?, and ?13 mhz crystal clock? to ?13 mhz crystal clock?. in the functional overview, changed ?cywusb6934? to ?cywusb6935?. in the application example, changed ?issp? to ?programming interface? *b 380254 see ecn bon updated the proc dc electrical characteristics. changed ?? 90 dbm receive sensi - tivity? to ?? 95 dbm receive sensitivity? in the feature section. removed lead-free part offering. changed supported cpu clock from 24 mhz to 12 mhz *c 392781 see ecn bon added the radio data rate considerations section
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